 |
Acid Traps
Due to the surface tension during the etching process,
larger deposits of acid may get trapped into certain areas -
resulting in over-etching.
Critical: Over-etching
will directly effect your board yields and performance.
|
 |
Find Net Discrepancy
Search for overlapping copper objects which have different nets
defined. This net discrepancy typically occurs when the PCB
layout software has incorrectly outputted intelligent formats such
as ODB++ and IPC-2581.
Critical: Indicates
a potential short originating from the PCB
design. May result in poor board performance,
failure, or other undesired effects.
|
|
Copper Slivers
Narrow areas in the copper where the potential for
over-etching is great. This typically happens when trace angles
are 30 degrees (or less), when composites are used, and on plane
layers.
Critical:
A board can fail if certain copper area are over-etched.
Resulting in shorts and decrease in board yield.
|
 |
Antennas / Dangling Traces
Search for Non-terminating traces which may behave as an
antenna. Such traces may be intentional, but a
warning is reported as a precaution.
Elevated Risk: May
result in poor board performance, short, or other undesired
effect.
|
 |
Minimum Clearance: Outer
Layers
May cause under-etching on copper areas and/or exceed PCB
fabricators capabilities. Resulting in possible opens or shorts.
Critical: May
result in poor board performance, short, or other undesired
effect.
|
 |
Minimum Clearance: Inner
Layers
May cause under-etching on copper areas and/or exceed PCB
fabricators capabilities. Resulting in possible opens or shorts.
Critical: May
result in poor board performance, short, or other undesired
effect.
|
 |
Minimum Annular Ring:
Drill-Pad
Search for all plated drills and ensure they have a minimum
copper annular ring. Having a minimum copper annular ring around
each drilled hole is required to assure it will be properly
fabricated.
Critical:
In many cases, drilled holes are not perfectly registered within
the exact center of each copper pad. Not having enough of a
copper annular ring, may make plating on vias, as well as
solder-ability on component holes more difficult. In extreme
cases, may result in poor board performance, failure,
or other undesired effects.
|
 |
Minimum Clearance:
Track-Track
Locate tracks (with different nets) on the same signal layer that
are placed too close to each other.
Critical: May
cause under-etching on copper areas and/or exceed PCB fabricators
capabilities. Resulting in poor board performance, short,
or other undesired effects.
|
 |
Minimum Clearance: Track-Pad
Locate tracks and pads (with different nets) on the same
signal layer that are placed too close to each other.
Critical: May
cause under-etching on copper areas and/or exceed PCB fabricators
capabilities. Resulting in possible opens, shorts, or other
undesired effects.
|
 |
Minimum Clearance: Pad-Pad
A copper pad on the signal layer is placed too close to other
copper pads (with a different net).
Critical: May
cause under-etching on copper areas and/or exceed PCB fabricators
capabilities. Resulting in possible opens, shorts, or other
undesired effects.
|
 |
Non-Functional Internal Pads
Essentially these are unconnected internal pads typically
found on plane layers.
Elevated Risk: May
break loose and cause potential drilling problems, risk of
shorts, and more.
|
 |
Minimum Pad Size
A very small diameter pad placed on a signal layer. This
typically occurs when incorrect pad stacks are defined within the
PCB layout software, or an error has occurred when PCB layout
software has generated the Gerber data.
Elevated Risk: May
cause etching or soldering problems during fabrication. Smaller
pads also provide less mechanical support for component leads.
|
 |
Clearance from Board Edge
Objects are placed too close or outside the PCB border.
Elevated Risk: May
result in exposed copper at the board edge which could lead to
corrosion and long term reliability problems.
|
 |
Minimum Width: SMT Pad
Locate SMT pads on top/bottom signal layers that have a smaller
width than permitted.
Elevated Risk: May
cause under-etching and/or uneven pad widths. May also result in
poor soldering performance & misalignment during assembly.
|
|
Minimum Clearance:
Rout-Copper
Search for Rout paths that are too close to signal objects.
Elevated Risk: During
NC routing process, copper may be damaged or result in other
undesired effects.
|
 |
Minimum Clearance: Same Net
Locate objects on the same net and signal layer that are too
close to each other.
Elevated Risk: May
cause under - etching on copper areas and / or exceed PCB
fabricators capabilities.Resulting in possible opens or shorts.
|
|
Hole Registration
Find drill holes that do no align with copper pads, due to
potential rounding errors found in the drill data, or other
causes.
Elevated Risk: This
may make plating on vias, as well as solder-ability on
component holes more difficult. In extreme cases, may
result in poor board performance, failure,
or other undesired effects.
|
|
Redundant Pads
Duplicate pads are commonly included in the manufacturing data
generated from PCB layout software.
Common:
This duplication may result in bloated file sizes, potential
issues during DFM verification, NC drilling, and your
wallet. That's correct your wallet. Many PCB
fabricators use pad counts and drill counts as a factor when
quoting prices to manufacture a PCB. Having
excessive pad and/or drill counts could lead to increased
manufacturing costs.
|
 |
Minimum Width: Track
Locate tracks which have a smaller width than the allocated
distance.
Common: May
cause etching problems during fabrication. The smaller the trace
width, the lower the yield for the PCB fabricator and the more
costly your boards may be.
|